(Ebook) Nanoelectronic Devices 1st Edition by Byung Gook Park, Sung Woo Hwang, Young June Park ISBN 9780429067303 0429067305

(Ebook) Nanoelectronic Devices 1st Edition by Byung Gook Park, Sung Woo Hwang, Young June Park ISBN 9780429067303 0429067305

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Author: Byung Gook Park, Sung Woo Hwang, Young June Park

(Ebook) Nanoelectronic Devices 1st Edition Table of contents:

Chapter 1 Quantum Mechanics for Nanoelectronic Devices

1.1 Fundamental Concepts of Quantum Mechanics

1.1.1 Wave Nature of Particles

Figure 1.1. Spectrum of hydrogen discharge lamp: (a) experimental setup, (b) emission spectrum.

Figure 1.2. Classical explanation of the emission spectrum of atoms: (a) emission intensity as a function of frequency, (b) mechanism of photo emission. Since the electron is accelerated toward the positively charged nucleus, it emits electromagnetic radiation and loses energy. The radius of electron orbit should shrink rapidly and the electron will eventually come in contact with the nucleus.

Figure 1.3. Standing wave formed in a circular orbit. de Broglie hypothesized that there was a wave associated with a particle (electron), and that it should form a standing wave to make a stable orbit.

1.1.2 Wave Functions and Operators

Figure 1.4. Classical physical quantities and corresponding quantum mechanical operators. The position operator is just a real number, but the momentum and energy operators are differentiation operators. ∇ is defined as in Cartesian coordinate system.

1.1.3 Schrödinger's Wave Equation

1.1.4 Meaning of the Wave Function

1.1.5 Electron in a Box

Figure 1.5. Potential energy for the particle-in-a-box problem. The potential energy is zero inside the box (–L/2 < x < L/2) and infinity outside it (x < −L/2 or x > L/2).

Example 1.1: Quantized energy of an electron in a box

1.2 Solid State and Energy Bands

1.2.1 Electron Waves and Energy Levels in Atoms

Figure 1.6. Spherical coordinate system. Three variables, r, θ, and φ, are defined.

Table 1.1. Five wave functions for electrons in a hydrogen atom

Table 1.2. Alternative names for angular momentum quantum numbers

Figure 1.7. Shape of the probability density functions for the electrons in a hydrogen atom.

Figure 1.8. Energy levels of electron orbitals in a multiple-electron atom.

1.2.2 Numerical Experiments with Quantum Well Model

Figure 1.9. Bound state energy levels and the shape of the wave functions for one-dimensional square well potential. The well depth (barrier height) is 3 eV and the well width is 0.5 nm. The calculated energy levels are marked by dotted lines and the corresponding wave functions are drawn.

Figure 1.10. Bound state energy levels and the shape of the wave function for two square wells. The well depth (barrier height) is 3 eV and the well width is 0.5 nm. The spacing between wells is (a) 0.5 nm and (b) 0.1 nm.

Figure 1.11. Bound state energy levels and the shape of the wave function for three square wells. The well depth (barrier height) is 3 eV, and the well width is 0.5 nm. The spacing between wells is 0.5 nm. See also Color Insert.

Figure 1.12. Bound state energy levels and the shape of the wave function for eight square wells. The well depth (barrier height) is 3 eV, and the well width is 0.5 nm. The spacing between wells is 0.5 nm. See also Color Insert.

1.2.3 Formation of Solids and Energy Bands

Figure 1.13. Formation of a solid and its energy bands. In this thought experiment, we assume that we can build a solid by bringing the atoms together from an infinite distance and that the inter-atomic distance can be adjusted at our will.

Figure 1.14. Explanation of the formation of energy bands in a solid after hybridization.

1.3 Energy Bands and Electrical Properties

1.3.1 Wave Function Analysis and Envelope Functions

Figure 1.15. Analysis of the wave functions. Roughly, a wave function can be approximated by the product of atomic wave functions and an envelope function.

Figure 1.16. Concept of an envelope function. In this analogy, the envelope function is shown to modulate each figure's height, implementing a wave.

1.3.2 Bloch Theorem

1.3.3 Wave Vectors and k-Space

Figure 1.17. Shape of the potential in a solid. The + symbols represent the positive ions and they determine the shape and the periodicity of the potential.

Figure 1.18. Allowed k vectors in k-space determined by periodic boundary conditions.

1.3.4 Bragg Reflection and Brillouin Zones

Figure 1.19. Reflection of X-ray by a crystal with a lattice constant d. The X-ray will be strongly reflected when the scattered partial waves interfere constructively. The dotted lines represent the parallel lattice planes of Bragg.

Figure 1.20. Reflection of electron wave inside a crystal with a lattice constant a. When the Bragg reflection condition is satisfied, a standing wave will be formed inside the solid due to the multiple reflections and constructive interference in the forward and backward directions.

Figure 1.21. One-dimensional lattice structure with lattice constant a and length L. If there are N lattice points, L is equal to Na.

Figure 1.22. Structure of k-space. All allowed k-values are represented as discrete points. The points that satisfy the Bragg condition are marked by short lines. Brillouin zones are defined as the continuous regions in the k-space that are divided by the points satisfying the Bragg condition. Exactly N allowed k points are contained in each Brillouin zone.

Example 1.2: Size of a Brillouin zone and k spacing

1.3.5 Energy-versus-k Diagram in One-Dimensional Space

Figure 1.23. 1D energy-versus-k diagram for (a) free electrons and (b) Bloch electrons.

Figure 1.24. Average probability density of finding electrons calculated from the position of the two standing waves compared with the position of the ions in a solid: (a) positions of the anti-nodes coincide with those of positive ions and (b) positions of the nodes coincide with those of ions.

Figure 1.25. Average probability density of finding electrons calculated from the position of the two partial standing waves compared with the position of the ions in a solid: (a) positions of the anti-nodes coincide with those of the positive ions and (b) positions of the nodes coincide with those of the ions.

Figure 1.26. Two schemes of representing the E versus k relationship: (a) extended zone scheme and (b) reduced zone scheme.

Figure 1.27. Crystal structure of semiconductors: (a) diamond structure for group IV semiconductors (Si, Ge,...), (b) zinc blende structure for III-V or II-VI compound semiconductors (GaAs, InP, ZnS,...).

1.3.6 Energy-versus-k Diagram in Three-Dimensional Space

Figure 1.28. Face-centered cubic (fcc) lattice and the corresponding Brillouin zone: (a) fcc lattice structure, (b) first Brillouin zone for the fcc lattice.

Figure 1.29. 3D energy-versus-k relationship: (a) direct energy gap material (GaAs) and (b) indirect energy gap material (Si).

Figure 1.30. Electrical properties determined by the band structure: (a) metal, (b) semiconductor, and (c) insulator.

1.3.7 Energy Band and Classification of Solids by Electrical Conduction

1.3.8 Semiclassical Equations of Motion for Electrons

Figure 1.31. Semiclassical model of an electron. A wave packet is formed with a large number of Bloch wave functions. The wave packet should be spread in real space over many atoms, and the spread in k space should be sufficiently smaller than the scale of the Brillouin zone.

1.3.9 Effective Mass

Figure 1.32. Dependence of effective mass on the curvature of energy-versus-k curve.

Figure 1.33. Realistic energy-versus-k relationship (a) and the effective mass (b).

1.3.10 Concept of Holes

Figure 1.34. Behavior of an empty state in the valence band and the concept of a hole band: (a) t = 0, and (b) t > 0.

1.4 Nanostructure Applications of Quantum Mechanics

1.4.1 Density of States for Electrons in a Macroscopic Box

Figure 1.35. Method of calculating the number of states within a given volume element in k space. It can be obtained by dividing the volume, dΩ, of the element by the volume occupied by one state.

Figure 1.36. Density of states as a function of energy.

1.4.2 Confinement and Density of States in Lower Dimensions

Figure 1.37. Quantum well: a two-dimensional electron system (2DES) with one-dimensional confinement. The length (d) of one side is nanoscale, while that (L) of the other two is macroscopic (d ≪ L).

Figure 1.38. Distribution of quantum states for a 2DES in k space.

Figure 1.39. Method of calculating the number of states within a given area element in two-dimensional k space. It can be obtained by dividing the area, of the element by the area (2π/L)2 occupied by one state.

Figure 1.40. Area for states with energy between E′ and E′ + dE′.

Figure 1.41. Density of states as a function of E′ for a subband of 2DES.

Figure 1.42. Density of states for the complete 2DES.

Figure 1.43. Quantum wire and quantum dot: (a) one-dimensional electron system (1DES) with two-dimensional confinement and (b) zero-dimensional electron system (ODES) with three-dimensional confinement.

Figure 1.44. Distribution of quantum states for 1DES in k space.

Figure 1.45. Allowed k-values in the kx axis and the length element for states with energy between E and E + dE.

Figure 1.46. Density of states as a function of E′ for a subband of 1DES.

Figure 1.47. Density of states for the complete 1DES.

Figure 1.48. Density of states: (a) for a state of 0DES, (b) for the complete 0DES.

1.4.3 Tunneling

Figure 1.49. Tunneling through a potential barrier.

Figure 1.50. Delta function potential barrier and the propagating waves.

PROBLEMS

Bibliography

Chapter 2 Electron Transport and Device Physics

2.1 Semiconductors and Carriers

2.1.1 Strategy for the Calculation of Carrier Concentration

Figure 2.1. Concept of density of states and distribution function.

2.1.2 Density of States in Semiconductors

Figure 2.2. General shape of the energy versus k diagrams near the band edge and the parabolic approximation (dotted lines) for (a) conduction band minimum and (b) valence band maximum.

2.1.3 Fermi-Dirac Distribution

Figure 2.3. Occupation of gr states with energy Er by nr indistinguishable Fermi particles.

Figure 2.4. Fermi-Dirac distribution function versus energy.

2.1.4 Electron and Hole Concentrations

Figure 2.5. Density of states and Fermi-Dirac distribution function for (a) electrons and (b) holes. The product of the two functions is also sketched.

2.1.5 Intrinsic Semiconductors

Example 2.1: Intrinsic carrier concentration of silicon at room temperature

Figure 2.6. Dopant impurities in group IV semiconductors: (a) donor (n-type dopant) and (b) acceptor (p-type dopant).

2.1.6 Carriers in Extrinsic Semiconductors

Example 2.2: Binding energy of an electron to a donor

Figure 2.7. Dopant energy levels: (a) donor and (b) acceptor. Since these states are localized, they are represented by a short bar.

Example 2.3: Electron and hole concentrations as a function of the doping concentration

Figure 2.8. Position of the Fermi level in a doped semiconductor: (a) n-type and (b) p-type.

2.1.7 Position of the Fermi Level

Figure 2.9. Position of the Fermi level as a function of (a) doping concentration and (b) temperature.

2.2 Carrier Transport

2.2.1 Drift of Carriers

Figure 2.10. Trajectory of an electron: (a) without electric field and (b) with electric field.

2.2.2 Diffusion of Carriers

Figure 2.11. Diffusion due to concentration gradient of carriers.

2.2.3 Total Current in Semiconductors

2.2.4 Invariance of Fermi Level in Equilibrium

Figure 2.12. Two materials in thermal contact. In thermal equilibrium, there is no current and no net charge or energy transfer between the two materials.

2.2.5 Non-Uniform Doping

Figure 2.13. Band diagram of a non-uniformly doped semiconductor in thermal equilibrium.

2.2.6 Einstein Relations

2.3 Generation, Recombination, and Continuity

2.3.1 Generation and Recombination Mechanisms

Figure 2.14. Carrier generation mechanisms: (a) optical generation, (b) trap-mediated thermal generation, and (c) generation by impact ionization.

Figure 2.15. Carrier recombination mechanisms: (a) recombination with optical emission, (b) recombination mediated by a trap, and (c) Auger recombination.

2.3.2 Excess Carriers and Recombination

2.3.3 Carrier Generation and Quasi-Fermi Levels

2.3.4 Continuity Equations

Figure 2.16. Differential volume element of cross-sectional area A and thickness dx. Jp(x) and Jp(x + dx) are the incoming and outgoing flux of holes.

2.3.5 Diffusion and Recombination

Figure 2.17. Steady-state concentration of holes as a function of distance when holes are injected at x = 0.

2.3.6 Gradients in the Quasi-Fermi Levels

Example 2.4: Band diagram of a uniformly doped semiconductor with an external bias voltage

2.4 p-n Junctions

2.4.1 Junction Formation and Built-In Potential

Figure 2.18. Hypothetical junction formation. If we bring n- and p- doped semiconductors together, there will be a large difference in their quasi-Fermi levels initially. The movement of carriers will generate depletion regions, and the electric field produced by the depletion charge will build up a potential across the depletion region.

Example 2.5: Another method of calculating the built-in potential

2.4.2 Space Charge Region: Depletion Approximation

Figure 2.19. (a) Charge density and (b) electric field distribution under the depletion approximation.

Figure 2.20. (a) Electric potential and (b) band diagram under the depletion approximation

Figure 2.21. Band diagram of a p-n junction under a reverse bias.

2.4.3 Junction Rule

Figure 2.22. Electron and hole quasi-Fermi levels in a p-n junction.

2.4.4 Minority Carrier Distribution in Neutral Regions

Figure 2.23. Minority carrier concentrations in the neutral regions.

2.4.5 Current in Ideal p-n Junctions

Figure 2.24. Current components in the depletion region of an ideal p-n junction. There is no net recombination in the depletion region, so that the electron and hole currents are constant.

Figure 2.25. Electron and hole current components in an ideal p-n junction.

2.4.6 Leakage Current and Breakdown in p-n Junctions

Figure 2.26. Electron and hole current components in a realistic p-n junction.

Figure 2.27. Various current components as a function of the applied bias voltage in a realistic p-n junction: (a) under reverse bias and (b) under forward bias

Figure 2.28. Two breakdown mechanisms in a p-n junction: (a) avalanche breakdown (impact ionization) and (b) Zener breakdown (tunneling).

Figure 2.29. Maximum field in n+-p one-sided junction.

2.4.7 Junction Tunnel Diodes

Figure 2.30. Operating principles of a junction tunnel diode: (a) V = 0, equilibrium, (b) V = Vp, maximum tunneling current due to the full alignment of electron energy levels in the n+ region and available state levels (hole energy levels) in the p+ region, and (c) V = Vv, no inter-band tunneling due to the alignment of the electron energy levels and the energy gap. Even in case (c), there can be a small trap-assisted tunneling current and a conventional diode current.

Figure 2.31. Current vs. voltage characteristic of a junction tunnel diode. Vp and Vv are the peak and valley voltage, respectively. Ip and Iv are the peak and valley current, respectively.

2.5 Metal-Semiconductor Contacts and Heterojunctions

2.5.1 Metal-Semiconductor Contacts

Figure 2.32. Band alignment in a metal-semiconductor system: (a) before contact of materials and (b) after contact of materials.

Figure 2.33. Band diagram of a metal-semiconductor system: (a) Ohmic contact with an n-type semiconductor, and (b) Ohmic contact with a p-type semiconductor.

Figure 2.34. Band diagram for an Ohmic junction formed by a heavy doping of the semiconductor surface region.

2.5.2 Heterojunctions

Figure 2.35. Bandgap alignment of heterojunctions: (a) straddling gap, (b) staggered gap, and (c) broken gap.

Figure 2.36. Band alignment in a heterojunction system before the contact of materials

Figure 2.37. Band diagram of heterojunction systems after the contact of materials: (a) n-P heterojunction and (b) n-N heterojunction.

Figure 2.38. Band diagrams of quantum structures based on heterojunctions: (a) quantum well and (b) tunnel barrier.

Figure 2.39. Quantum structures based on heterojunctions: (a) quantum wire and (b) quantum dot.

PROBLEMS

Bibliography

Chapter 3 MOS Structure and CMOS Devices

3.1 MOS Structure

3.1.1 Basic Concepts of MOS Structure

Figure 3.1. Band alignment in a metal-oxide-semiconductor (MOS) system: (a) before contact of materials and (b) after contact of materials.

Figure 3.2. Flat-band condition for a MOS structure.

Figure 3.3. Flat-band voltage (VFB) as a function of gate material, semiconductor type, and doping concentration.

Figure 3.4. Flat-band condition for a MOS structure with an effective oxide charge Qox at the interface.

Figure 3.5. Accumulation of carriers. Majority carriers are accumulated at the surface.

Figure 3.6. Depletion of carriers. Majority carriers are pushed away from the oxide-semiconductor interface.

Figure 3.7. Inversion of carriers. Minority carriers become the majority carriers.

Figure 3.8. Weak inversion. At the surface, the electron concentration is higher than the hole concentration. The depletion charge, however, still dominates the space charge.

Figure 3.9. Strong inversion. At the surface, electron concentration is so high that the inversion charge is dominating the space charge.

Example 3.1: Comparison of currents supplied by various mechanisms (see Fig. 3.10)

Figure 3.10. Comparison of currents supplied by various mechanisms: (a) minority carrier drift, (b) generation in the depletion region, and (c) majority carrier drift.

3.1.2 MOS Equations

Figure 3.11. Application of Gauss' law and the definitions of the oxide voltage and the semiconductor surface potential.

3.1.3 Analysis of the Space Charge Region

Figure 3.12. Semiconductor band diagram and the definitions of semiconductor potential, surface potential, and Fermi potential.

Figure 3.13. Semiconductor charge per unit area as a function of the surface potential. See also Color Insert.

3.1.4 Strong Inversion

Figure 3.14. Comparison between (a) weak inversion (or depletion) and (b) strong inversion.

3.1.5 Threshold Voltage

Figure 3.15. Band diagram and charge density at the threshold voltage.

Example 3.2: Calculation of the threshold voltage of a MOS structure

3.1.6 Capacitance vs. Voltage (C–V) Characteristics

Figure 3.16. Equivalent circuit for a MOS capacitor.

Figure 3.17. Voltage applied to a MOS capacitor during (C–V) measurements.

Figure 3.18. Charge distribution in a MOS capacitor during (C–V) measurements: (a) under the accumulation condition and (b) under the depletion or weak inversion condition.

Figure 3.19. Low-frequency (C–V) characteristic for a MOS capacitor with a p-type substrate.

Figure 3.20. Charge distribution in a MOS capacitor during low-frequency (C–V) measurement under the inversion condition.

Figure 3.21. High frequency (C–V) characteristic for a MOS capacitor with a p-type substrate.

Figure 3.22. Charge distribution in a MOS capacitor during high-frequency (C–V) measurements under the inversion condition.

3.1.7 Quantum Effect on the MOS (C–V) Characteristics

Figure 3.23. Quantized energy levels and the ground-state wave function in the inversion layer of a MOS capacitor.

Figure 3.24. Normalized electron concentration as a function of the position in a MOS capacitor.

Figure 3.25. Quantum effect on the current-voltage (C–V) characteristics of a MOS capacitor. In this simulation, the oxide thickness is 3 nm, and the substrate doping is 3 × 1017 cm−3.

3.2 MOSFET and Its Operation

3.2.1 Concept of MOSFET

Figure 3.26. MOSFET structure: (a) cross-section and (b) three-dimensional structure.

Figure 3.27. Simulated MOSFET band diagrams for various bias conditions: (a) cross-section of the MOSFET shown as it appears in a three-dimensional plot, (b) conduction band minimum as a function of location at VG = −1 V, (c) at VG = 0.2 V, and (d) at VG = 1 V. The gate length of the MOSFET is 1 μm, the oxide thickness is 2 nm, the substrate doping is 1018 cm−3, and the source/drain doping is 1020 cm−3. The substrate material is silicon. See also Color Insert.

Figure 3.28. Simulated MOSFET band diagrams for various bias conditions: (a) conduction band minimum as a function of location at VG = 0.8 V, VD = 0.4 V and (b) at VG = 0.8 V, VD = 1 V. All the other device parameters are the same as those for Fig. 3.27. See also Color Insert.

3.2.2 Understanding MOSFET Operation

Figure 3.29. Gated diode structure. The dot-dash line is the line along which the band diagram will be drawn in Fig. 3.30.

Figure 3.30. Band diagram of a gated diode: (a) with zero channel bias and (b) with positive channel bias.

Figure 3.31. Band diagram and charge concentration in a gated diode structure: (a) with zero channel bias and (b) with positive channel bias.

Figure 3.32. Bias voltages and the channel inversion charge in a MOSFET structure. The inversion layer is delineated by a solid line and the depletion region by the dotted line. The channel bias at the marked position is V, and the inversion charge is Qn.

Figure 3.33. Channel inversion charge in a MOSFET under the pinch-off condition. The inversion charge becomes zero at the drain end of the channel.

Figure 3.34. Subthreshold characteristic of MOSFET

3.2.3 Current-Voltage Characteristics

Figure 3.35. n-channel MOSFET with a strong inversion layer formed throughout the channel. Two axes, x and y, are defined. The surface potential ψ and the inversion charge Qn dependon y only.

Figure 3.36. Three operating regions of a MOSFET: cutoff, saturation, and linear regions.

Figure 3.37. Output characteristics of a MOSFET ID vs. VD characteristics are drawn for six gate bias voltages. The dotted line shows the boundary between the linear region and the saturation region.

3.2.4 Secondary Effects in MOSFETs

3.3 CMOS Circuits

3.3.1 Circuit Symbol of MOSFETs

Figure 3.38. MOSFET circuit symbols: (a) n-channel MOSFET and (b) p-channel MOSFET.

Figure 3.39. A MOSFET circuit: (a) with a cross-sectional MOSFET image and full connection diagram and (b) with a MOSFET circuit symbol and abbreviated connection diagram.

3.3.2 Complementary MOSFET (CMOS) Circuits

Figure 3.40. CMOS inverter: (a) cross section and (b) circuit diagram. See also Color Insert.

3.3.3 CMOS Logic Gates

3.3.4 Memory Circuits

Figure 3.41. CMOS NAND circuit.

Figure 3.42. DRAM cell that consists of an n-channel MOSFET (pass transistor) and a capacitor.

Figure 3.43. Two circularly connected CMOS inverters that can be used as a core of an SRAM cell. If we add two pass transistors, an SRAM cell is constructed.

Figure 3.44. Structure of a memory cell array. See also Color Insert.

Figure 3.45. Flash memory cell transistor: (a) cross section and (b) circuit symbol.

Figure 3.46. Fowler-Nordheim tunneling mechanism: (a) A triangular tunnel barrier is formed due to a strong electric field and (b) the tunneling current increases exponentially as the effective barrier thickness decreases due to the increase in the electric field.

Figure 3.47. NAND flash memory array. The array consists of N SSL, N GSL, and (M × N) cell transistors.

PROBLEMS

Bibliography

Chapter 4 Quantum Well Devices

4.1 Issues in CMOS Device Scaling

4.1.1 MOSFET Scaling Trend

Figure 4.1. Average design rule vs. year. The predictions of the SIA roadmap and the ITRS are also plotted. See also Color Insert.

Figure 4.2. MOSFET inverter circuit for the calculation of delay.

4.1.2 Short-Channel Effects

Figure 4.3. Short-channel effects. As the channel length of an n-MOSFET decreases, the measured threshold voltage (VT) also decreases. Such a decrease becomes more severe when the channel length is shorter or the drain voltage is higher.

Figure 4.4. Sharing of depletion charge between the gate and the source/drain: (a) long-channel MOSFET and (b) short-channel MOSFET.

Figure 4.5. Diagram for the quantitative analysis of the short channel effect. The two gray triangular regions are assumed to be the depletion region generated by the source and the drain.

Figure 4.6. Drain-induced barrier lowering (DIBL). The drain voltage affects the potential barrier between the source and the channel and reduces the barrier. The channel length of MOSFET is 50 nm and the channel doping is 3 × 1018 cm−3.

Figure 4.7. Subthreshold characteristics of a MOSFET showing DIBL. The channel length and the doping are the same as those of Figure 4.6. See also Color Insert.

4.1.3 Punch-Through

4.1.4 Velocity Saturation

Figure 4.8. Progress of punch-through as we increase the drain voltage: (a) VD = 0.1 V, (b) VD = 1 V, (c) VD = 2 V, (d) VD = 3 V, and (e) potential barrier height as a function of depth from the oxide-silicon interface (position = 0). The channel length and the doping are the same as those of Figure 4.6. See also Color Insert.

Figure 4.9. Subthreshold characteristics showing the impact of punch-through on the drain current. The channel length and the doping are the same as those of Figure 4.6. See also Color Insert.

Figure 4.10. Carrier velocity vs. electric field: (a) electron and hole velocity in bulk silicon and (b) electron velocity in a silicon MOSFET channel. See also Color Insert.

4.1.5 MOSFET Scaling Theory

Figure 4.11. Method of generalized scaling.

4.1.6 Dopant Number Fluctuation

Example 4.1: Dopant number fluctuation

Figure 4.12. Position and shape of charge fluctuation: (a) the infinitesimal volume element where the charge fluctuation occurs, and (b) simplifying assumption of the charge fluctuation. In (b), the effect of the dopant fluctuation in (a) is assumed to be equivalent to that of a uniform delta function implant of dose ΔD and depth x. The top plate represents the semiconductor surface. See also Color Insert.

Figure 4.13. Dependence of the electric field profile on the position of charge fluctuation: (a) electric field profile when x is small and (b) electric field profile when x is close to Wdm. See also Color Insert.

4.1.7 p-n Junction and Oxide Tunneling

Example 4.2: Band-to-band tunneling current

Figure 4.14. Two tunneling mechanisms in oxide: (a) Fowler-Nordheim and (b) direct tunneling.

Figure 4.15. Tunneling current density as a function of the gate voltage: (a) Thicker oxides. Reproduced with permission from K.F. Schuegraf, D. Park, and C. Hu, “Reliability of Thin SiO2 at Direct Tunneling Voltage,” IEDM Tech. Dig., p. 609, 1994. © 1994 IEEE. (b) Thinner oxides. Reproduced with permission from S.-H. Lo, D.A. Buchanan, Y. Taur, and W. Wang, “Quantum Mechanical Modeling of Electron Tunneling Current from the Inversion Layer of Ultrathin Oxide nMOSFETs,” IEEE Electron. Device. Lett., vol. 18, no. 5, pp. 209–211, 1997. © 1997 IEEE.

4.2 Approaches to Overcoming Scaling Issues in Nanoscale MOSFETs

4.2.1 Device Structure Engineering

Figure 4.16. Comparison of three device structures: (a) planar structure, (b) ultra-thin body (UTB) structure, and (c) double-gate (DG) structure.

4.2.2 Gate Insulator and Stack Engineering

Table 4.1. Dielectric constants of various insulator materials

4.2.3 Channel and Source/Drain Engineering

Figure 4.17. Retrograde (low-high) channel profile.

4.3 Double-Gate MOSFETs

4.3.1 Classification of Double-Gate Structures

Figure 4.18. Three types of DG structures: (a) Type 1: horizontal length (L), horizontal width (W), (b) Type 2: vertical L, horizontal W, and (c) Type 3: horizontal L, vertical W. The arrow indicates the direction of current. Gates are formed on both sides of the channel, but are omitted in this figure. See also Color Insert.

4.3.2 Simple Model of Double-Gate MOSFETs

Figure 4.19. Electric field and charge distribution of an n-channel DG MOSFET: (a) under the depletion condition and (b) under the inversion condition.

Example 4.3: Threshold voltage of an n-channel DG MOSFET

4.3.3 Quantum Mechanical Correction to the Threshold Voltage of Double-Gate MOSFETs

Figure 4.20. Band diagram and charge distribution of an n-channel DG MOSFET: (a) thick channel with surface inversion (the two channels are separated), and (b) thin channel with bulk inversion (the two channels are merged).

Example 4.4: Ground-state energy level of an n-channel DG MOSFET with a thin body

Figure 4.21. Threshold voltage of an n-channel DG MOSFET as a function of the body thickness. The effect of the quantum mechanical correction becomes conspicuous when the body is thinned down to just a few nanometers.

4.4 Tunneling and Resonant Tunneling Devices

4.4.1 Tunneling Field Effect Transistor

Figure 4.22. Tunneling field effect transistor (TFET). A p+-source is used instead of the n+-source in order to use the induced tunnel junction between the source and the channel.

Figure 4.23. Band diagram of a TFET: (a) Off-state: electron tunneling from the valence band of the source to the conduction band of the channel is blocked. (b) On-state: electrons tunnel from the valence band of the source to the conduction band of the channel.

Figure 4.24. Subthreshold characteristics of a TFET. This device shows a subthreshold swing value less than 60 mV/decade at room temperature.

4.4.2 Resonant Tunneling Diodes

Figure 4.25. Shape of the wave function at the resonance in a double potential barrier structure.

Figure 4.26. Transmission coefficients vs. incident electron energy for a single barrier and a double barrier structure. The barrier is assumed to be 6-monolayer (1.7 nm) AlAs. In the double barrier structure, a 20-monolayer (5.65 nm) GaAs well is assumed to lie between two such barriers. The surrounding material is GaAs. Only the Γ-point minimum in the conduction band is considered.

Figure 4.27. Double barrier potential and the propagating waves.

Figure 4.28. Graphical method to solve Eq. (4.68).

Figure 4.29. Generation of peak and valley current in a resonant tunneling diode: (a) before the peak current, (b) at the peak current, and (c) after the peak current.

Figure 4.30. Current vs. voltage characteristic of a resonant tunneling diode. Vp and Vv are the peak and valley voltage, respectively. Ip and Iv are the peak and valley currents, respectively.

PROBLEMS

Bibliography

Chapter 5 Quantum Wire Devices

5.1 Transport in One-Dimensional Electron Systems

5.1.1 Backgrounds

5.1.2 Ideal 1DES

Figure 5.1 Schematics of a 2DES and a 1DES. The electron motion in the y-direction is frozen out in a 2DES. In a 1DES, electrons move freely only in the z-direction.

Example 5.1: Calculation of the Fermi energy of a 1DES

Figure 5.2 An ideal 1DES connecting two reservoirs with the chemical potentials μ and μ + Δμu.

Example 5.2: Calculation of the resistance quantum

5.1.3 Semiconductor 1DESs

Figure 5.3 Schematic of a semiconductor 1DES. Classically, electrons fly in the z-direction while bouncing off the walls. Quantum mechanically, the small cross section results in subband energy level spacings that are quite large. Each subband corresponds to a quantum state whose wave function is confined inside the cross section. The z-component of the wave function is that of a free electron with the effective mass of the semiconductor.

Figure 5.4 Cross-sectional TEM image of a cylindrical silicon 1DES with a radius of 4 nm (from Ref. 2). The wire is surrounded by the gate oxide with a thickness of 3.5 nm and then the TiN gate material. The schematic and the TEM image of the lower panel show that two nanowires bridge the source and drain bulk. There is a silicon plateau underneath the nanowires.

Figure 5.5 Formation of silicon 1DES utilizing gate depletion. The positively biased upper gate induces electrons in the silicon region, and the negatively biased lower gate depletes the electrons underneath to form a 1DES. See also Color Insert.

Figure 5.6 1DES fabricated utilizing the split gate technique on GaAs/AlGaAs HEMT wafers. A negative bias on the two gates separated by a narrow gap depletes electrons underneath, forming a narrow wire-type electron layer in the gap region.

Example 5.3: Calculation of 1D energy levels

Figure 5.E1. (a) Schematic of a GaAs 1DES embedded in an AlGaAs matrix with larger bandgap. (b) Schematic of the conduction band diagram along the x-axis.

Figure 5.7 1DES fabricated from nanowires grown with a bottom-up method. The VLS-grown nanowires are spread over the SiO2/Si substrate, and two metal contacts are deposited on both sides of the nanowire. The Si substrate acts as a back gate with the insulating layer of SiO2. See also Color Insert.

Figure 5.8 The uppermost panel shows the conductance quantization as a function of the gate bias in semiconductor 1DESs. The lower panels show the first experimental observation of conductance quantization. The device structure of the so-called quantum point contact was fabricated by forming the split gates on a GaAs/AlGaAs HEMT. The quantized conductance steps as a function of the gate bias are observed.

Example 5.4: Potential calculation of a realistic 1DES

Figure 5.E2 Cross section of a deep etched GaAs 1DES

Figure 5.E3 Calculated potential along the width direction of the 1DES

5.1.4 Silicon 1DESs

Figure 5.9 (a) Valley degeneracy of silicon. There are six oval shaped constant energy surfaces along the k-axes. (b) We can expect a different type of conductance quantization due to this valley degeneracy. See also Color Insert.

5.1.5 Wave Nature of Electrons

Example 5.5: An impurity in a semiconductor 1DES

Figure 5.E4 Potential profile of a 1DES with an impurity at x = 0

Figure 5.10 Electron Y-branch switch. The waveguide is divided into two branches. The bias of the gate on top of one branch can regulate the passage of electron waves through the branch.

Figure 5.11 Mach–Zehnder interferometer. The waveguide is first divided into two branches, and then they are merged into one. The gate on one of the branches creates a energy difference and thus a difference between the phases of the waves in the two branches. The merging of the two waves with different phases results in the interference pattern.

Figure 5.12 A 1D channel with a potential barrier. The conductance through the channel is proportional to the transmission coefficient T of the barrier. The sum of T and the reflection coefficient R is equal to 1.

Example 5.6: Transmission probability of a 1DES with an impurity

5.1.6 Ballistic Transport in Short-Channel MOSFETs Under High Electric Fields

Figure 5.13 Schematic of the band diagram profile of a short-channel MOSFET The conduction band edge of the channel region is pulled up due to the positive gate bias. When the drain bias is large, the whole band is pulled down from the drain side, leaving a barrier in the source side. The electrons are injected over this source barrier.

5.2 Nanowire MOSFETs

5.2.1 Evolution of MOSFETs

Figure 5.14 Evolution of silicon 3D transistors. The names of the devices reflect the number and shape of the gates. (Tri-gate and Omega-gate device in the lower row are schematically redrawn from Refs. 9 and 10. The photo of the cylindrical-gate device is from Ref. 2.) See also Color Insert.

5.2.2 Analytical Model of Nanowire MOSFETs

Figure 5.15 Schematic of a gate-all-around silicon nanowire field effect transistor. A silicon cylinder is surrounded by the gate oxide and the poly-Si gate. The cylinder is undoped except for both ends, which are heavily n doped to form the source/drain contacts. The right panel shows the cross section of the cylinder and the axes of the cylindrical coordinate system used to mathematically model the physics of the device. (The figure was schematically redrawn from Ref. 11.)

Figure 5.16 A Gaussian surface inside the silicon cylinder. The Gaussian surface is part of the dark cylinder with radius R and length L. The source and drain are away from the top and bottom of the Gauss surface. Only the oxide and the gate within L are shown. The electric field perpendicular to the surface exists only at the sidewall of the surface.

Figure 5.17 Calculation of the current distributed within Δt from the surface.

Example 5.7: Comparison of planar and nanowire MOSFETs

Example 5.8: Current-voltage characteristics of a nanowire

Figure 5.E5 IDS as a function of VGS at various values of VDS in the linear regime. The results are calculated from Eq. (5.33). The results of numerical simulations are also shown. See also Color Insert.

PROBLEMS

Bibliography

Chapter 6 Quantum Dot Devices

6.1 Zero-Dimensional Electron Systems

6.1.1 Semiconductor Quantum Dot as ODESs

Figure 6.1 Schematic of ODES. The electrons would have moved freely in the z-direction without two walls (1DES). The walls create the potential barriers, and the electrons can go across the walls either by quantum mechanical tunneling or by jumping over them. The electrostatic energy of such a 0DES is a strong function of the number of captured electrons when the distance between the two walls is small enough.

Figure 6.2 Semiconductor 0DES and schematic band diagram. A small piece of semiconductor is surrounded by an insulator with a larger bandgap. The right figure shows a sketch of the conduction band with a potential well (small piece of semiconductor) and quantum mechanical energy levels occupied with a few electrons with different spins.

Figure 6.3 Examples of semiconductor ODES: (a) a TEM photo of an InAs self-assembled quantum dot embedded in a GaAs matrix; (b) ODES formed by the etching of a vertical pillar using a GaAs/AlGaAs quantum well wafer; (c) split gates on top of a GaAs/AlGaAs HEMT wafer; and (d) a 1D nanowire etched on an SOI wafer with two metal gates acting as barriers. See also Color Insert.

6.1.2 Coulomb Blockade

Figure 6.4 (Left) A schematic of the quantum dot connected to the source and the drain reservoir by tunnel barriers. (Right) A calculated current-voltage characteristic of such a quantum dot at three different temperatures. At the lowest temperature, a suppression of the current near zero bias can be observed. This is the manifestation of the Coulomb blockade phenomenon. See also Color Insert.

Figure 6.5 I–V characteristics of the quantum dot with values of C = 0.5, 1, and 5 aF and T = 4.2 K. All of them show clear gap structures near zero bias, suggesting that the single-electron charging energy is larger than kB T in all three quantum dots at this temperature. See also Color Insert.

Example 6.1: Classical charging energy of a silicon nanosphere

Example 6.2: Charging energy of silicon spheres

6.1.3 Single-Electron Transistors

Figure 6.6 Schematic of a single-electron transistor. There are two tunnel barriers for the electron tunneling to and from the source and drain reservoir and the gate that can control the potential of the quantum dot continuously.

Figure 6.7 (Upper left) Electrostatic energy of the quantum dot when φext is an integer multiple of −e/2C, (Upper right) electrostatic energy of the quantum dot when φextt is a half integer multiple of −e/2C,(Lower) gate bias dependence of the conductance (or current) as a function of φext.

6.1.4 Fock–Darwin States

Figure 6.8 Experimental observation of Fock-Darwin states in GaAs quantum dot. (Upper) the current peak position of the Coulomb blockade oscillations in the gate bias as a function of the magnetic field. (Lower) Calculated Fock-Darwin states as a function of the magnetic field. Both diagrams have a good similarity.

6.1.5 Spin States and Quantum Computing

6.1.6 Example of Semiconductor Single-Electron Transistors

Figure 6.9 Spilt gate single-electron transistor (same as Fig. 6.3(c)). The negative biases on six split gates deplete the electrons underneath. Finite depletion layers create a disc-shaped electron region connected to the source and the drain reservoir by two bottlenecks. The biases on the gates also change the potential of the quantum dot.

Figure 6.10 (Upper) Schematic, SEM photo, and the I–V characteristic of a GaAs SET The quantum dot, tunnel barriers, and the reservoir are defined simultaneously by a single etching step (reprinted with permission from S.H. Son, K.H. Cho, S.W. Hwang, K.M. Kim, Y.J. Park, Y.S. Yu, and D. Ahn, “Fabrication and characterization of metal-semiconductor field-effecttransistor-type quantum devices,” J. Appl. Phys. 96, 1, 704–708, copyright 2004, American Institute of Physics). (Lower) Schematic, SEM photo, and the I–V characteristic of a silicon SET. This SET was fabricated by full silicon VLSI processing technology (reprinted from Microelectronic Eng., 63 (1–3), B.H. Choi, S.H. Son, K.H. Cho, S.W. Hwang, D. Ahn, D.H. Kim, J.D. Lee, B.G. Park, “Direct observation of excited states in double quantum dot silicon single electron transistor,” 129–133, 2002, with permission from Elsevier).

6.2 Modeling of Single-Electron Transistors

6.2.1 Effect of the Drain Bias

Figure 6.11 Equivalent circuit of the double junction corresponding to the schematic in the left panel of Fig. 6.4.

Example 6.3: Electron tunneling rates

Example 6.4: Calculation of the probabilities

6.2.2 Effect of Finite Temperature

6.2.3 Effect of the Gate Bias

Figure 6.12 Typical temperature dependence of a single-electron transistor. It shows a Coulomb gap near zero bias (VDS = 0) at low temperatures. The Coulomb gap smears out as T increases, finally becoming linear.

Figure 6.13 Circuit diagram of a single-electron transistor consisting of a double junction and a gate. The drain bias and the gate bias are denoted as Vb and Vg, respectively. The capacitance C1 and C2 are tunnel capacitances. The capacitance Cg is the normal capacitance.

Figure 6.14 Coulomb diamond in Vg–Vb bias plane. Four lines denote the boundary delineating the region of each tunneling condition. The hatched region is where both are possible so that the current flow from junction 1 to junction 2 is possible.

6.2.4 Brief Review of Single-Electron Circuit Simulation

Figure 6.15 (a) A part of a single-electron circuit showing three single-electron transistors, (b) equivalent circuit when external biases are set to zero, and (c) equivalent circuit when only external biases are considered.

6.2.5 Examples of Single-Electron Circuits

Figure 6.16 Flow chart for obtaining the solution to the master equation of Eq. (6.33).

Figure 6.17 Schematic diagram of a single-electron inverter consisting of two single-electron transistors in series. Both gates of the SETs are hooked together, forming an input terminal. The load capacitor C L is connected in the junction between the two SETs. The output voltage is the voltage drop across C L.

Figure 6.18 Calculated transfer characteristics of the single-electron inverter shown in Fig. 6.15. The output voltage swing of this inverter is smaller than the bias voltage, and the logic low does not approach zero in this type of inverter.

Figure 6.19 T-dependence of the transfer characteristics of the inverter shown in Fig. 6.15. The logic swing is a strong function of T, approaching zero at T = 300 K, at which temperature the Coulomb blockade is not effective because of the thermal fluctuation.

Figure 6.20 Single-electron logic circuits consisting only of SETs with one gate: (a) inverter, (b) NOR, and (c) OR gate.

Figure 6.21 Single-electron circuits consisting of SETs with two gates: (a) inverter, (b) XOR, (c) NAND, and (d) NOR gate.

Figure 6.22 Multi-input SECs: (a) NAND and (b) XOR gate.

Figure 6.23 Single-electron FET logic circuits: (a) universal literal gate (ULG) proposed by Inokawa, (b) ULG by Uchida, and (c) ULG by Mahapatra.

Figure 6.24 Single-electron-FET memory circuits: (a) SRAM cell by Inokawa, (b) modified SRAM cell, (c) SRAM cell by Yu, and (d) SRAM cell by Mahapatra.

PROBLEMS

Figure 6.P1 A gate-all-around silicon nanowire field effect transistor. The electrons confined inside the nanowire feed an oval-shaped potential. The oval has the short axis in the r-direction of the cylindrical coordinate, and the long axis along the z-direction. See also Color Insert.

Figure 6.P2 Schematic of a single-electron transistor consisting of a double junction and a gate. The drain bias and the gate bias are denoted as Vb and Vg, respectively. The capacitance C1 and C 2 are tunnel capacitances. The capacitance C g is the normal capacitance.

Figure 6P3 Example of measured Coulomb diamond. VDS and VGS correspond to Vb and Vg, respectively. The solid lines denote the slopes of the diamond.

Bibliography

Chapter 7 MOSFET as a Molecular Sensor

7.1 Introduction

7.1.1 Potentiometry vs. Amperometry

Figure 7.1 Operational principles of the amperometric bio sensor. The target molecule A is changed to B with the help of the enzyme coated on the working electrode (Electrode #1), and the resulting electrons are absorbed by the working electrode to form the electric current. By measuring the electric current through Electrode #1, the existence of the molecule A is sensed.

7.1.2 FET-Based (Bio)Chemical Sensor

Figure 7.2 A schematic diagram illustrating the similarity between N-type (a) MOSFET device and (b) FET-based (bio)chemical sensor. Notice that the charges are the signals for both cases and are converted into the current between source and drain.

7.1.3 Two Types of (Bio)Chemical FET Sensor: ISFET and Affinity-Based FET

7.2 Some Basics of Chemistry and the Importance of H+

7.2.1 Some Basics of Chemistry

7.2.1.1 Aqueous solution

7.2.1.2 pH

7.2.1.3 Buffer solution

Figure 7.3 A schematic diagram showing (a) the dissociation and recombination of HA molecule and (b) donor atom in the semiconductor. The energy is not to scale, but the energies of the ions will be different after dissociation in water.

7.2.1.4 Many biological reactions involve H+

Figure 7.4 Schematic representation of the biochemical reactions related to glycolysis and the respiration taking place in the cell. The outputs of glycolysis and respiration include ATP, lactic acid, and CO2. Many of them generate protons as a byproduct. Also shown in the figure is the ISFET structure, which senses the change in [H+]. By sensing the change in [H+], the metabolism around the cell can be sensed. For example, in the glycolysis cycle, glucose is supplied from the blood as the result of the intake of nutrition, and ATP is generated with some H+ generated as the by product.

7.2.2 Charges of Important Biomolecules

Figure 7.5 Charge states of DNA molecules and proteins: (a) A DNA molecule is negatively charged in the solution as the proton in the phosphor backbone is emitted; (b) a protein molecule is positively charged or negatively charged according to emission and absorption of the proton in NH (A sites) and COOH (B sites) radicals.

7.3 EISFET

7.3.1 EISFET Structures

Figure 7.6 EISFET structure with the n-type FET. The device can be divided into three important regions: the gate-electrolyte region, the FET region, and the EI interface region. The FET device is an n-channel device, and VGS is applied to the electrode in the electrolyte with respect to the source voltage.

7.3.1.1 Reference electrode

7.3.1.2 Electrolyte

7.3.1.3 Insulator film

7.3.1.4 EI (Electrolyte insulator) interface

7.3.2 Theory of EISFET [24]

Figure 7.7 Energy diagram of (a) MOS and (b) EISFET when VGS = VTH is applied. VFB for MOS is the difference between the work function of the metal and semiconductor if there exist no charges in the insulator and semiconductor surface. In EISFET, even though VFB of MOS is applied, the semiconductor band is not flattened because of the charges (Qei) at the EI interface.

Figure 7.8 Schematic diagrams of (a) the EDL (electric double layer), and (b) the energy diagram across the EDL for the electrolyte containing Na+ and Cl− ions. Notice that the EDL consists of two layers, the diffusion and Helmholtz layers.

7.3.2.1 Theory of electric double layer: the diffusion layer

7.3.2.2 The Helmholtz layer

7.3.2.3 Relationship between Qei and [H+] in the electrolyte

Figure 7.9 The surface of the insulator (SiO2 as the example) is neutral when the SiOH bond is formed (SiO site is saturated with H). If H is dissociated, it becomes negatively charged. If H is additionally attached, it becomes positively charged. In this case, the surface site is called amphoteric. The chemical reaction constants from SiOH to SiO− and SiOH+ are K– and K+, respectively.

7.3.2.4 Theory of semiconductor surface

7.3.2.5 Total charges in the system and equivalent circuit

Figure 7.10 (a) The charge distribution in each region of the EIS system. Charges are represented by the charges/unit area. (b) The equivalent circuit represented by the equivalent capacitance to represent each region of the EIS system.

7.3.2.6 ISFET current equation relating pH and current

Figure 7.11 A typical relationship between pH and the change in the threshold voltage. Approximately, log-linear relationship is found, which is due to the charge and potential relationship in Eqs. (7.13) and (7.21). Redrawn from Ref. [24].

7.4 Biomolecule Sensors Based on the FET Principle

7.4.1 Some Historical Background

Figure 7.12 DNAFET based on a silicon (a) planar FET and (b) nanowire FET. Notice that both the probe DNA and the target DNA have negative charges in the electrolyte solution. See also Color Insert.

7.4.2 Theory of DNA FET

7.4.2.1 Binding events

7.4.2.2 Nds is considered the sheet charge layer

Figure 7.13 A schematic diagram of the DNAFET. (a) The double-strand DNA after the hybridization event is considered an insulator film containing a space charge, pds. (b) One-dimensional charge distribution and (b') the equivalent circuit of the DNAFET immersed in an electrolyte solution with DNA sheet charge. (c) Schematic diagram of the DNAFET with the DNA layer as an insulator film and (c') the equivalent capacitance from a point (y) of the DNA space charge to the electrolyte is denoted as Cdif(y).

7.4.2.3 Nds has a finite thickness

7.4.3 Some Limitations on DNA FET

Figure 7.14 The schematic diagram of the screening effect. (a) The energy diagram without the DNA charge. The effect of the DNA charge outside of the diffusion layer is considered in (b). If the Debye length is shorter than the distance from the diffusion layer, the effect of the DNA charge is screened.

7.5 Summary

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