(Ebook) Embedded Systems Architecture Programming and Design 2nd Edition by Raj Kamal ISBN 0070151253 9780070151253

(Ebook) Embedded Systems Architecture Programming and Design 2nd Edition by Raj Kamal ISBN 0070151253 9780070151253

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ISBN 10: 0070151253 
ISBN 13: 9780070151253
Author: Raj Kamal

(Ebook) Embedded Systems Architecture Programming and Design 2nd Table of contents:

1.1 EMBEDDED SYSTEMS
1.1.1 System
1.1,2 Embedded System
1.2 PROCESSOR EMBEDDED INTO A SYSTEM
1.2.1 Embedded Processors in a System
1.2.2 Microprocessor
1.2.3 Microcontroller
1.2.4 Single Purpose Processors
" 1.3 EMBEDDED HARDWARE UNITS AND DEVICES IN A SYSTEM
1.3.1 Power Source
*1.3.2 Clock Oscillator Circuit and Clocking Units
1.3.3 System Timers and Real-time Clocks
1.3.4 Reset Circuit, Power-up Reset and Watchdog-Timer Reset
1.3.5 Memory
1.3.6 Input, Output and IO Ports, IO Buses and IO Interfaces
1.3.7 DAC Using a PWM and an ADC
1.3.8 LCD, LED and Touchscreen Displays
1.3.9 Keypad/Keyboard
1.3.10 Pulse Dialer, Modem and Transceiver
1.3.11 Interrupt Handler
1.4 EMBEDDED SOFTWARE IN A SYSTEM
1.4.1 Final Machine Implementable Software for a System
1.4.2 Coding of Software in Machine Codes
1.4.3 Software in Processor Specific Assembly Language
1.4.4 Software in High Level Language
Example 1.1
1,4.5 Program Models for Software Designing
1.4 fi Software for Concurrent Processing and Scheduling of Multiple Tasks and ISRs Using an RTOS
1.4.7 Software for Device Drivers and Device Management in an
Operating System
1.4.8 Software Tools for Designing an Embedded System
1.4.9 Software Tools Required in Exemplary Cases
1.5 EXAMPLES OF EMBEDDED SYSTEMS
J, tg
1.6 EMBEDDED SYSTEM-ON-CHIP (SoC) AND USE OF VLSI CIRCUIT DESIGN TECHNOLOGY
i ,ps :
1.6.1 Application Specific IC (ASIC)
1.6.2 IP Core
1.6.3 FPGA Core with Single or Multiple Processors
1.7 COMPLEX SYSTEMS DESIGN AND PROCESSORS
1.7.1 Embedding a Microprocessor
1.7.2 Embedding a Microcontroller
1.7.3 Embedding a DSP
1.7.4 Embedding an RISC
1.7.5 Embedding an ASIP
1.7.6 Embedding a Multiprocessor or Dual Core Using GPPs
1.7.7 Embedded Processor/Embedded Microcontroller
1.7.8 Embedding ARM processor
1.7.9 Embedding ASSP
1.8 DESIGN PROCESS IN EMBEDDED SYSTEM
1.8.1 Design Metrics
1.8.2 Abstraction of Steps in the Design Process
1.8.3 Challenges in Embedded System Design: Optimizing Design Metrics
"1.9 FORMALIZATION OF SYSTEM DESSb"”
1.10 DESIGN PROCESS AND DESIGN EXAMPLES
1.10.1 System Design Process Examples
1.10.2 Automatic Chocolate Vending Machine (ACVM)
1.10.3 Smart Card
1.10.4 Digital Camera
1.10.5 Mobile Phone
1.10.6 Mobile Computer
1.10.7 A Set of Robots
1.11 CLASSIFICATION OF EMBEDDED SYSTEMS
"1.12 SKILLS REQUIRED FOR AN EMBEDDED SYSTEM DESIGNER
Summary
Keywords and their Definitions
Review Questions
infiyil Practice Exercises
Memory Organization and Real-world
2.1 8051 ARCHITECTURE
7 2.1.1 8051 Microcontroller Architecture
2.1.2 Instruction Set
2.1.3 IO Ports, Circuits and IO Programming
Example 2.1
Example 2,2
2.1.4 External Memory Interfacing Circuits
2.1.5 Counters and Timers
2.1.6 Serial Data Communication input/Output
2.1.7 Interrupts in 8051
2.2 REAL WORLD INTERFACING
2.2.1 System Bus-based and ID Bus-based 10s fo*- Rea! Woild Interfacing
Example 2. 3
Example 2. 4
Example 2. 5
*2.2 IO Addresses of Ports and Devices in Real World Interfacing
2.23 Device Addresses in Rea! World Interfacing
Example 2.6
2.2.4 Interrupts and IOs
Example 2.7
2.2.5 Bus Arbitration
2.2,6 Interfacing Examples with Keyboard, Displays, D/A and A/D Conversions
2.3 INTRODUCTION TO ADVANCED ARCHITECTURES
2.3.1 Architecture of the Advanced Processors
2.3.2 80x86 Architecture
23.3 ARM
Example 2.8
2.3.4 SHARC
2.3.5 DSP
2.4 PROCESSOR AND MEMORY ORGANIZATION
2.4.1 Processor Organization
2.4.2 Memory Organization
Example 2.9
Example 2.10
2.5 INSTRUCTION-LEVEL PARALLELISM
2.5.1 Pipelined and Superscalar Units
Example 2.11
2.6 PERFORMANCE METRICS
2.7 MEMORY-TYPES, MEMORY-MAPS AND ADDRESSES
2,7.1 Memory in a System
2.7.2 Address Allocations in Memory
Example 2.14
Example 2.15
“ 2.8 "PROCESSOR SELECTION ””
2.8.1 Microcontroller Selection
(. J
o
2.9 MEMORY SELECTION
Keywords and their Definitions
J Review Questions
Practice Exercises
3.1 10 TYPES AND EXAMPLES
3.1.1 Synchronous Serial Input
3.1.3 Synchronous Serial Input-Output
3.1.4 Asynchronous Serial input
3.1.5 Asynchronous Serial Output
3.1.6 Parallel Port
3.1.7 Half Duplex and Full Duplex
3.1.8 Examples of Serial and Parallel Port 10s
3.2 SERIAL COMMUNICATION DEVICES
3.2.1 Synchronous, Iso-synchronous and Asynchronous Communications from Serial Devices
Example 3.1
3.2.2 RS232C/RS485 Communication
Example 3.2 J
Example 3.3
3.2.3 UART
3.2.4 HDLC Protocol
3.2.5 Serial Data Communication using the SPI, SCI and SI Ports
3.2.6 Secure Digital Input Output (SDIO)
3.3 PARALLEL DEVICE PORTS
J
Example 3. 4
Example 3. 5
I—J
3.3.1 Parallel Port Interfacing with Switches and Keypad
Example 3.6
3.3.2 Parallel Port Interfacing with Encoders
3.3.3 Parallel Port Interfacing with Stepper Motor
3.3.4 Parallel Port Interfacing with LCD Controller
3.3.5 Parallel Port Interfacing with Touchscreen
Example 3.7
3.4 SOPHISTICATED INTERFACING FEATURES IN DEVICE PORTS
3.5 WIRELESS DEVICES
3.6 TIMER AND COUNTING DEVICES
3.6.1 Timing Device
3.6.2 Counting Device
3.6.3 Timer cum Counting Device
3.7 WATCHDOG TIMER
Example 3.8
3.8 REAL TIME CLOCK
Example 3.9
3.9 NETWORKED EMBEDDED SYSTEMS
3.10 SERIAL BUS COMMUNICATION PROTOCOLS
3.10.1 l2C Bus
3.10.2 CAN Bus
3.10.3 USB Bus
3.10.4 FireWire — IEEE 1394 Bus Standard
3.10.5 Advanced Serial High Speed Buses
3.1 1 PARALLEL BUS DEVICE PROTOCOLS-PARALLEL COMMUNICATION NETWORK USING ISA, PCI, PCI-X AND ADVANCED BUSES
3.11.1 ISA Bus
3.11.2 PCI and PCI/X Buses
3.11.3 ARM Bus
3.11.4 Advanced Parallel High Speed Buses
3.12 INTERNET ENABLED SYSTEMS—NETWORK PROTOCOLS
—'I !±
3.12.1 Hyper-Text Transfer Protocol (HTTP)
3.12.2 Transport Control Protocol (TCP)
3.12.3 User Datagram Protocol (UDP) I
3.12.4 Internet Protocol (IP)
3.12.5 Ethernet
3.13 WIRELESS AND MOBILE SYSTEM PROTOCOLS
3.13.1 Infrared Data Association (IrDA)
3.13.2 Bluetooth
3.133 802.11
3.13.4 ZigBee
Summary
I i
Review Questions
Practice Exercises
Device Drivers and Interrupts Service Mechanism
4.1 PROGRAMMED-I/O BUSY-WAIT APPROACH
WITHOUT INTERRUPT SERVICE MECHANISM
E' Example 4.1
4.2 ISR CONCEPT
.2,1 Examples of Port or Device Interrupts and ISRs
Example 4.2
, I
_ f
Example 4. 3
Example 4. 4
Example 4. 5
4.2.2 Examples of Software Interrupts and ISRs
Example 4.6
4.2.3 Interrupt Service Threads as Second-Level Interrupt Handlers
4.2.4 Device Driver
4.3 INTERRUPT SOURCES
Example 4.7
Example 4.8
4.4.1 Interrupt Vector
Example 4.9
I
4.4.2 Classification of All Interrupts as Non-Maskable and Maskable Interrupts
4.4.3 Enabling (Unmasking) and Disabling (Masking) in Case of Maskable Interrupt Sources
Example 4.10
4.4.4 Status Register or interrupt Pending Register
Example 4.1 1
Example 4.1 2
4.5 MULTIPLE INTERRUPTS
4.5.1 Multiple Interrupt Calls
4.5.2 Hardware Assigned Priorities

4.6 CONTEXT AND THE PERIODS FOR CONTEXT SWITCHING, INTERRUPT LATENCY AND DEADLINE
Example 4.1 3
Example 4.1 4
4.6.1 Interrupt Latency
Example 4.15
4.6.2 interrupt Service Deadline
4,63 Software Over-riding of Hardware Prior it les to Meet Service Deadlines
Example 4.16
“ 4.7 CLASSIFICATION OF PROCESSORS INTERRUPT SERVICE MECHANISM FROM CONTEXT-SAVING ANGLE
4.8 DIRECT MEMORY ACCESS
== j -
4.8.1 Use of DMAC
Example 4.17
4.8.2 Use of DMA Channel in Case of Multiple Interrupts in Quick Succession from the Same Source
4.9 DEVICE DRIVER PROGRAMMING
4.9.1 Writing Physical Device-Driving ISRs in a System
4.9.2 Virtual Device Drivers
4.9.3 Parallel Port Drivers in a System
Example 4.18
4.9.4 Serial Part Drivers in a System
Example 4.19
4.9.5 Device Drivers for Internal Programmable Timing Devices
Example 4.2 0
Example 4.2 1
4.9.6 Linux internals as Device Drivers and Network Functions
Summary
Keywords and their Definitions
Review Questions
Practice Exercises
5.1 SOFTWARE PROGRAMMING IN ASSEMBLY LANG¬
UAGE (ALP) ANO IN HIGH-LEVEL LANGUAGE ZC
5.1.1 Assembly Language Programming
5.1.2 High-level Language Programming
5.2 C PROGRAM ELEMENTS: HEADER AND SOURCE FILES
AND PREPROCESSOR DIRECTIVES
5.2.1 Include Directive for the Inclusion of Files
Example 5.1
5.2.2 Source Files
5.2.3 Configuration Files
5.2.4 Preprocessor Directives
5.3 PROGRAM ELEMENTS: MACROS AND FUNCTIONS
5.4 PROGRAM ELEMENTS: DATA TYPES, DATA STRUCTURES, MODIFIERS, STATEMENTS, LOOPS AND POINTERS
5.4.1 Use of Data Types
5.4.2 Use of Pointers and Null Pointers
Example 5.2
5.4.3 Use of Data Structures: Queues, Stacks, Lists and Trees
Example 5.3
Example 5.4
Example 5.5
Example 5.6
5.4.4 Use of Modifiers
5.4.5 Use of Loops, Infinite Loops and Conditions
Example 5. 8
Example 5. 9
Example 5.11
5.4.7 Multiple Function Calls in Cyclic Order
Example 5.12
5.4.8 Function Pointers, Function Queues and ISR Queues
5.4.9 Queuing of Functions on Interrupts
Zxtifnpie 5,13
;’wF'
5.5 OBJECT-ORIENTED PROGRAMMING
5.6 EMBEDDED PROGRAMMING IN C++
5.6.1 Advantages of C++
5.6.2 Disadvantages of C++
>.6.3 Optimization of Codes in Embedded C++ Programs to Eliminate the Disadvantages
5.7 EMBEDDED PROGRAMMING IN JAVA
5.7.1 Java Programming Basics
5.7.2 Java Programming Advantages
5.7.3 Disadvantages of Java
5.7.4 J2ME
".7.5 JavaCard and Embedded Java
■s"' Zjv Keywords and their Definitions
Review Questions
Practice Exercises
6.1 PROGRAM MODELS
Example 6.1
Example 6.2
L.J
Example 6.4
6.3 STATE MACHINE PROGRAMMING MODELS FOR
EVENT-CONTROLLED PROGRAM FLOW
Example 6.6
6.3.1 Finite States Machine (FSM) Model
6.3.2 FSM State Table
Example 6.8
Example 6.9
a.4 Jf-IMG OF MUfXIPROCESSOR SYSTEMS
6.4.1 Multiprocessor Systems
6.4.2 Model of Unfolding SDFGs into Homogeneous SDFGs
5,4.3 Model of Unfolding HSDFGs into APEGs
Example 6.11
6.4,4 Applications of the Graphs to Multiprocessor Systems;
Partitioning and Scheduling
6.5 UML MODELLING
Practice Exercises
7.1 MULTIPLE PROCESSES IN AN APPLICATION
7,1.1 Process
7.2 MULTIPLE THREADS IN AN APPLICATION
Example 7.2
7.3 TASKS
Example 7.3
7.4 TASK STATES
Example 7.4
" 7.5 TASK AND DATA
Example 7.5
7.5.1 Task Control Block
7.6 CLEAR-CUT DISTINCTION BETWEEN FUNCTIONS, ISRs AND TASKS BY THEIR CHARACTERISTICS
7.6.1 Task Coding in Endless Event-Waiting Loop
Example 7.6
7.^.2 Distinction between Function, ISR and Task.
' 7.7 CONCEPT OF SEMAPHORES
7.7.1 Use of a Semaphore as an Event-Signalling or Notifying Variable
Example 7.7
|: JF
7.7.2 Use of a Semaphore as Resource Key and for Critical Section
Example 7.8
7.7.3 Use of Multiple Semaphores for Synchronizing the Tasks
Example 7.9
7.7.4 Counting Semaphores
Example 7.10
7.7.5 P and V SEMAPHORES
Example 7.11
Example 7.12
Example 7.13
Example 7.14
r.
7.8 SHARED DATA
7.8.1 Problem of Sharing Data by Multiple Tasks and Routines
Example 7.15
7.8.2 Shared Data Problem Solutions
Example 7.16
7.8.3 Applications of Semaphores and Shared Data Problem
7.8.4 Elimination of Shared Data Problem
7.8.5 Priority Inversion Problem and Deadlock Situations
7.9 INTERPROCESS COMMUNICATION -
Example 7.1 7
Example 7.1 8
”7.10 SIGNAL FUNCTION
7.11 SEMAPHORE FUNCTIONS
7.11.1 Mutex, Lock and Spin Lock
" 7.12 MESSAGE QUEUE FUNCTIONS
Example 7.19
"7.13 MAILBOX FUNCTIONS
Example 7.20
7.14 PIPE FUNCTIONS
Example 7.21
1;
7.15 SOCKET FUNCTIONS
Example 7.22
Example 7.23
"7.16 RPC FUNCTIONS
Keywords and their Definitions
Review Questions
Practice Exercises
Real-Time Operating Systems
8.1 OS SERVICES
8.1.1 Goal
8.1,2 User and Supervisory Mode Structure
Example 8.1 y
8.1.3 Structure
8.1.4 Kernel
8.2
PROCESS MANAGEMENT
8.2.1 Process Creation
Example 8.2
8.2.2 Management of the Created Processes
~ 8.3 TIMER FUNCTIONS ’ "
Example 8. 3
Example 8. 4
. J
Example 8.5
8.4 EVENT FUNCTIONS . ,t*
8.5 MEMORY MANAGEMENT
8.5.1 Memory Allocation
8.5.2 Memory Management after Initial Allocation
Example 8.6
8.6 DEVICE, FILE AND IO SUBSYSTEMS MANAGEMENT
8.6.1 Device Management
Example 8.7
8.6.2 File System Organization and Implementation
8.6.3 I/O Subsystems
Example 8.8
8.7 INTERRUPT ROUTINES IN RTOS ENVIRONMENT AND HANDLING OF INTERRUPT SOURCE CALLS
8.7.1 Direct Call to an ISR by an Interrupting Source and ISR Sending an ISR Enter Message
Example 8. 9
8.7.2 RTOS First Interrupting on an Interrupt, then OS Calling the Corresponding ISR
Example 8.1 0
8.7.3 RTOS First Interrupting on an Interrupt, then RTOS Initiating the ISR and then an ISR
Example 8.1 1
8.8 REAL-TIME OPERATING SYSTEMS
8.9 BASIC DESIGN USING AN RTOS
8.9.1 Principles
Example 8.12
Example 8.13
Example 8.14
8.9.2 Encapsulation Using the Semaphores and Queues
8.9.4 Saving of Memory and Power
8 .10 RTOS TASK SCHEDULING MODELS, INTERRUPT LATENCY AND RESPONSE TIMES OF THE TASKS AS PERFORMANCE METRICS
8.10.1 Cooperative Scheduling Model
Example 8.1 7
8.10.2 Cyclic and Round Robin with Time Slicing Scheduling Models
Example 8.1 8
Example 8.19
8.10.3 Preemptive Scheduling Model
sample 8.20
8.10.4 Model for Critical Section Service by a Preemptive Scheduler
8.10.5 Earliest Deadline First (EDF) precedence and Rate Monotonic Schedulers (RMS) Models
1 _ J
8.10.6 Fixed (Static) Real-Time Scheduling Model
8.10.7 Latency and Deadlines as Performance Metric in Scheduling Models For Periodic, Sporadic and Aperiodic Tasks
8.10.8 CPU Load as Performance Metric
8.10.9 Sporadic Task Model Performance Metric
8.11 OS SECURITY ISSUES
Summary
Keywords and their Definitions
Review Questions
Practice Exercises
SYSTEM PROGRAMMING-I: MicroC/OS-ll and VxWorks
”9.1 BASIC FUNCTIONS AND TYPES OF RTOSes "
9.1.2 Types of RTOSes
~ 9.2 RTOS gCOS-ll
9.2.1 System-Level Functions
Example 9.1
Example 9.4
Example 9.5
Example 9.6
9.2.2 Task Service and Time Functions and their Exemplary Uses
Example 9.7
Example 9.8
Example 9.9
Example 9.10
Example 9.11
9.2.3 Time Delay Functions
Example 9.12
Example 9.13
9.2 4 Memory Allocation-Related Functions
Example 9.14
Example 9.15
9.2.5 Semaphore-Related Functions
Example 9.16
Example 9.17
Example 9.1.8
9.2.6 Mailbox-Related Functions
Example 9.19
9.2.7 Queue-Related Functions
Example 9.20
9.3 RTOS VxWorks
9.3.1 Basic Features
9.3.2 Task Management Library at the System Library Header File
9,3.3 VxWorks System Functions and System Tasks
).3.4 IPC Functions
Example 9.21
Example 9.22
Example 9.23
J
Example 9.24
Example 9.26
Summary
Keywords and their Definitions
Review Questions
Practice Exercises
10.1 WINDOWS CE
10.1.1 Windows CE Features
10.1.2 Windows CE Programming
10.1.3 Windows and Windows Management
10.1.4 Memory Management
10.1.5 Files and Registry
10.1.6 Windows CE Databases
10.1.7 Processes, Threads and IPCs
0.1.8 Inputs from Keys, Touch Screen or Mouse
10.1.9 Communications and Networking
10.1.10 Device-to-Device Socket and Communication Functions
10.1.11 Win32 API Programming
Example 10.1
10.1.12 Creating Windows
10.2 OSEK
10.3 LINUX 2.6.x AND RTLINUX
.0.3.1 Real Time Linux Functions
: I
Lu
103.2 RTLinux
Example 10.3
Practice Exercises
11.1 CASE STUDY OF EMBEDDED SYSTEM DESIGN AND CODING FOR AN AUTOMATIC CHOCOLATE VENDING MACHINE (ACVM) USING MUCOS RTOS
11.1.1 Requirements
11.1.2 Specifications
11.1.3 Specifications Modeling Using UML
11.1.4 ACVM Hardware Architecture
11.1.5 Software Architecture
11.1.6 Creating a List of Tasks, Functions and IPCs
11.1.7 Exemplary Coding Steps
Example 11.1
11.2 CASE STUDY OF DIGITAL CAMERA HARDWARE AND SOFWARE ARCHITECTURE
11.2.1 Requirements
11.2.2 Class Diagrams
11.2.4 Digital Camera Software Architecture
“11.3 CASE STUDY OF CODING FOR SENDING APPLICATION LAYER BYTE STREAMS ON A TCP/IP NETWORK USING RTOS VxWorks
11.3.1 Requirements
t
11.3.2 Class Diagram, Classes and Objects
2:
11.3.3 TCP Stack Hardware and Software Architecture
11.3.4 Exemplary Coding Steps
Example 11.2
I:
I;
Summary
Keywords and their Definitions
Review Questions
12.1 CASE STUDY OF COMMUNICATION BETWEEN ORCHESTRA ROBOTS
12.1.1 Requirements
12.1.2 Class Diagram and Classes
12.1.3 State Diagram
12.1.4 Robot Orchestra MIDI Communication Hardware and Software Architecture
12.1.5 Communication Tasks Synchronization Model
”12.2 EMBEDDED SYSTEMS IN AUTOMOBILE
"12.3 CASE STUDY OF AN EMBEDDED SYSTEM FOR AN ADAPTIVE CRUISE CONTROL (ACC) SYSTEM IN A CAR
12.3.1 Requirements
12.3.2 Class Diagrams
12.3.3 ACC Hardware Architecture
12.3.4 ACC Software Architecture
12.3.5 ACC Software tasks Synchronization Mode!
12.3.6 ACC Software Implementation
12.4 CASE STUDY OF AN EMBEDDED SYSTEM FOR A SMART CARD
12.4.1 Requirements
12.4.2 Ciass Diagram
12.4.3 Hardware and Software Architecture
12.4.4 Synchronization Model
Example 12.2
12.5 CASE STUDY OF A MOBILE PHONE SOFTWARE FOR KEY INPUTS
12.5.1 Requirements
12.5.2 Class Diagram and Classes
12.5.3 State Diagram
12.5.4 SMS Keying Hardware
12.5.5 SMS Create and Send Application Software Architecture
12.5.6 Software Tasks and Synchronization Model
Summary
and their Definitions
Review Questions
Sh Practice Exercises
Development Process and Tools
13.1 INTRODUCTION TO EMBEDDED SOFTWARE DEVELOPMENT PROCESS AND TOOLS
13.1.1 Development Process and Hardware-Software
13.1.2 Software Tools
“13.2 HOST AND TARGET MACHINES "
13,2.1 Using a Host System
13.2.2 Target System
’ 13.3 LINKING AND LOCATING SOFTWARE
13.3.1 Differences in Files, Addressing and Address Resolution Method
13.3.2 Locator Output File in Binary Image Motorola-S and Intel Hex Formats
13.3.3 Memory Map for coding a locator
13.4 GETTING EMBEDDED SOFTWARE INTO THE TARGET SYSTEM
13.4.1 Device PROM or Flash Programmer
13.4.2 Programming Method of Device Programmer
' 13.5 ISSUES IN HARDWARE-SOFTWARE DESIGN AND CO-DESIGN
3.5.1 Choosing Right Platform
13.5.2 Memory- and Processor-Sensitive Software
13.5.3 Allocation of Addresses to Memory, Program Segments and Devices
Example 13.1
13.5.4 Porting Issues of OS in an Embedded Platform
3.5.5 Performance and Performance Accelerators
I Summary
Review Questions
Practice Exercises
resting, Simulation and debugging Techniques ind Tools
14.1 TESTING ON HOST MACHINE
14.2 SIMULATORS
14.2.1 Simulator Features
.2.2 Simulator Possible Inabilities
.2.3 Simulating tool Software
14.2.4 Prototype Development, Testing and Debugger Tools for Embedded System
14.3 LABORATORY TOOLS
14.3.1 Simple Volt-Ohm Meter
14.3.2 Simple LED Tests and Logic Probe
L4.3.3 Oscilloscope
14.3.4 Bit Rate Meter
14.3.5 Logic Analyser

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Tags: Raj Kamal, Embedded, Systems