(Ebook) Attaining High Performance Communications A Vertical Approach 1st edition by Ada Gavrilovska 1420093088 9781420093087

(Ebook) Attaining High Performance Communications A Vertical Approach 1st edition by Ada Gavrilovska 1420093088 9781420093087

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ISBN-10 :  1420093088 

ISBN-13 :  9781420093087 

Author:  Ada Gavrilovska 

No single solution applied at one particular layer can help applications solve all performance-related issues with communication services. Instead, this book shows that a coordinated effort is needed among the layers. It covers many different types of technologies and layers across the stack, from the architectural features of the hardware, through the protocols and their implementation in operating system kernels, to the manner in which application services and middleware are using underlying platforms. The book also describes key developments in high-end platforms, high performance interconnection fabrics and communication libraries, and multi- and many-core systems.

Attaining High Performance Communications A Vertical Approach 1st table of contents:

1 High Performance Interconnects for Massively Parallel Systems
1.1 Introduction
1.2 Performance
1.2.1 Metrics
1.2.2 Application Sensitivity to Communication Performance
1.2.3 Measurements on Massively Parallel Systems
1.3 Network Topology
1.3.1 The “Dead Topology Society”
1.3.2 Hierarchical Networks
1.3.3 Hybrid Networks
1.3.4 Novel Topologies
1.4 Network Features
1.4.1 Programming Models
1.5 Future Directions
1.6 Chapter Summary
2 Commodity High Performance Interconnects
2.1 Introduction
2.2 Overview of Past Commodity Interconnects, Features and Trends
2.3 InfiniBand Architecture
2.3.1 IB Communication Model
2.3.1.1 IB Topology and Network Components
2.3.1.2 IB Messaging
2.3.2 Overview of InfiniBand Features
2.3.2.1 Link Layer Features
2.3.2.2 Network Layer Features
2.3.2.3 Transport Layer Features
2.3.3 InfiniBand Protection and Security Features
2.3.4 InfiniBand Management and Services
2.4 Existing InfiniBand Adapters and Switches
2.4.1 Channel Adapters
2.4.2 Switches
2.4.3 Wide Area Networks (WAN) and Routers
2.5 Existing InfiniBand Software Stacks
2.5.1 Low-Level Interfaces
2.5.2 High-Level Interfaces
2.5.3 Verbs Capabilities
2.6 Designing High-End Systems with InfiniBand: Case Studies
2.6.1 Case Study: Message Passing Interface
2.6.1.1 Higher-Level MPI Design components
2.6.1.2 Network-Level MPI Design Components
2.6.2 Case Study: Parallel File Systems
2.6.3 Case Study: Enterprise Data Centers
2.7 Current and Future Trends of InfiniBand
3 Ethernet vs. EtherNOT
3.1 Overview
3.2 Introduction
3.2.1 Defining Ethernet vs. EtherNOT
3.2.2 Forecast
3.3 Background
3.3.1 Ethernet Background
3.3.2 EtherNOT Background
3.4 Ethernet vs. EtherNOT?
3.4.1 Hardware and Software Convergence
3.4.2 Overall Performance Convergence
3.5 Commercial Perspective
3.6 Concluding Remarks
4 System Impact of Integrated Interconnects
4.1 Introduction
4.2 Technology Trends
4.3 Integrated Interconnects
4.3.1 HyperTransport (HT)
4.3.2 QuickPath Interconnect (QPI)
4.3.3 PCI Express (PCIe)
4.3.4 Summary
4.4 Case Study: Implementation of Global Address Spaces
4.4.1 A Dynamic Partitioned Global Address Space Model (DPGAS)
4.4.2 The Implementation Path
4.4.3 Bridge Implementation
4.4.4 Projected Impact of DPGAS
4.5 Future Trends and Expectations
5 Network Interfaces for High Performance Computing
5.1 Introduction
5.2 Network Interface Design Issues
5.2.1 Offload vs. Onload
5.2.2 Short vs. Long Message Handling
5.2.3 Interactions between Host and NIC
5.2.3.1 Host Interface and Cache Interaction
5.2.3.2 The OS and OS-bypass
5.2.3.3 Command Queue Management
5.2.3.4 Event Posting / Completion Notification
5.2.3.5 Interrupts
5.2.4 Collectives
5.3 Current Approaches to Network Interface Design Issues
5.3.1 Quadrics QsNet
5.3.2 Myrinet
5.3.3 InfiniBand
5.3.4 Seastar
5.3.5 PathScale InfiniPath and Qlogic TrueScale
5.3.6 BlueGene/L and BlueGene/P
5.4 Research Directions
5.4.1 Offload of Message Processing
5.4.1.1 Associative List Processing to Accelerate Matching
5.4.1.2 List Management in Hardware
5.4.1.3 A Programmable Unit for Header Matching
5.4.2 Offloading Collective Operations
5.4.2.1 NIC-Based Atomics
5.4.2.2 Triggered Operations
5.4.2.3 Operation Associativity... or Not
5.4.3 Cache Injection
5.5 Summary
6 Network Programming Interfaces for High Performance Computing
6.1 Introduction
6.2 The Evolution of HPC Network Programming Interfaces
6.3 Low-Level Network Programming Interfaces
6.3.1 InfiniBand Verbs
6.3.2 Deep Computing Messaging Fabric
6.3.3 Portals
6.3.4 Myrinet Express (MX)
6.3.5 Tagged Ports (Tports)
6.3.6 LAPI
6.3.7 Sockets
6.4 Distinguishing Characteristics
6.4.1 Endpoint Addressing
6.4.2 Independent Processes
6.4.3 Connections
6.4.4 Privacy
6.4.5 Operating System Interaction
6.4.6 Data Movement Semantics
6.4.6.1 Data Transfer Unit
6.4.6.2 Reliability
6.4.6.3 Ordering
6.4.6.4 Non-Contiguous Transfers
6.4.6.5 Peer Communication
6.4.6.6 Group Communications
6.4.7 Data Transfer Completion
6.4.7.1 Multi-Protocol Support
6.4.7.2 Failures
6.4.8 Portability
6.5 Supporting MPI
6.5.1 Copy Blocks
6.5.2 Progress
6.5.3 Overlap
6.5.4 Unexpected Messages
6.6 Supporting SHMEM and Partitioned Global Address Space (PGAS)
6.6.1 Fence and Quiet
6.6.2 Synchronization and Atomics
6.6.3 Progress
6.6.4 Scalable Addressing
6.7 Portals 4.0
6.7.1 Small Message Rate
6.7.1.1 Unexpected Messages
6.7.1.2 Resource Isolation
6.7.1.3 Logical Endpoint Translation
6.7.2 PGAS Optimizations
6.7.3 Hardware Friendliness
6.7.4 New Functionality
7 High Performance IP-Based Transports
7.1 Introduction
7.2 Transmission Control Protocol — TCP
7.2.1 TCP Origins and Future
7.2.2 TCP in High Speed Networks
7.2.3 TCP Variants
7.2.3.1 Loss-based Congestion Control
7.2.3.2 Loss-based Congestion Management in LFNs
7.2.3.3 Delay-Based Congestion Control
7.3 TCP Performance Tuning
7.3.1 Improving Bandwidth Utilization
7.3.2 Reducing Host Loads
7.4 UDP-Based Transport Protocols
7.5 SCTP
7.6 Chapter Summary
8 Remote Direct Memory Access and iWARP
8.1 Introduction
8.2 RDMA
8.2.1 High-Level Overview of RDMA
8.2.2 Architectural Motivations
8.2.3 Fundamental Aspects of RDMA
8.2.4 RDMA Historical Foundations
8.2.5 Programming Interface
8.2.6 Operating System Interactions
8.3 iWARP
8.3.1 High-Level Overview of iWARP
8.3.2 iWARP Device History
8.3.3 iWARP Standardization
8.3.4 Trade-Offs of Using TCP
8.3.5 Software-Based iWARP
8.3.6 Differences between IB and iWARP
8.4 Chapter Summary
9 Accelerating Communication Services on Multi-Core Platforms
9.1 Introduction
9.2 The “Simple” Onload Approach
9.2.1 Limitations of the “Simple” Onload
9.3 Partitioned Communication Stacks
9.3.1 API Considerations
9.4 Specialized Network Multi-Cores
9.4.1 The (Original) Case for Network Processors
9.4.2 Network Processors Features
9.4.2.1 Programming Models
9.4.2.2 IXP family of NPs
9.4.3 Application Diversity
9.5 Toward Heterogeneous Multi-Cores
9.5.1 Impact on Systems Software
9.6 Chapter Summary
10 Virtualized I/O
10.1 Introduction
10.1.1 Virtualization Overview
10.1.1.1 Paravirtualization
10.1.1.2 Full virtualization
10.1.2 Challenges with I/O Virtualization
10.1.3 I/O Virtualization Approaches
10.2 Split Device Driver Model
10.2.1 Overview
10.2.2 Performance Optimization Opportunities
10.2.2.1 Data movement
10.2.2.2 Scheduling
10.2.2.3 Interrupt processing
10.2.2.4 Specialized Driver Domain
10.3 Direct Device Access Model
10.3.1 Multi-Queue Devices
10.3.2 Device-Level Packet Classification
10.3.3 Signaling
10.3.4 IOMMU
10.4 Opportunities and Trade-Offs
10.4.1 Scalability
10.4.2 Migration
10.4.3 Higher-Level Interfaces
10.4.4 Monitoring and Management
10.5 Chapter Summary
11 The Message Passing Interface (MPI)
11.1 Introduction
11.1.1 Chapter Scope
11.1.2 MPI Implementations
11.1.2.1 Technical Reasons
11.1.2.2 Political Reasons
11.1.2.3 Monetary Reasons
11.1.3 MPI Standard Evolution
11.1.3.1 Portability
11.1.4 Chapter Overview
11.2 MPI’s Layer in the Network Stack
11.2.1 OSI Network Stack
11.2.2 Networks That Provide MPI-Like Interfaces
11.2.3 Networks That Provide Non-MPI-Like Interfaces
11.2.4 Resource Management
11.2.4.1 Unexpected Messages
11.2.4.2 Processing Speed Disparity
11.3 Threading and MPI
11.3.1 Implementation Complexity
11.3.2 Application Simplicity
11.3.3 Performance Implications
11.4 Point-to-Point Communications
11.4.1 Communication/Computation Overlap
11.4.2 Pre-Posting Receive Buffers
11.4.3 Persistent Requests
11.4.4 Common Mistakes
11.4.4.1 Orphaning MPI Requests
11.4.4.2 Overusing MPI ANY SOURCE
11.4.4.3 Misusing MPI PROBE
11.4.4.4 Premature Buffer Reuse
11.4.4.5 Serialization
11.4.4.6 Assuming Blocking Communication Buffering
11.5 Collective Operations
11.5.1 Synchronization
11.6 Implementation Strategies
11.6.1 Lazy Connection Setup
11.6.2 Registered Memory
11.6.3 Message Passing Progress
11.6.4 Trade-Offs
11.7 Chapter Summary
12 High Performance Event Communication
12.1 Introduction
12.2 Design Points
12.2.1 Lessons from Previous Designs
12.2.2 Next Generation Event Delivery
12.3 The EVPath Architecture
12.3.1 Taxonomy of Stone Types
12.3.2 Data Type Handling
12.3.3 Mobile Functions and the Cod Language
12.3.4 Meeting Next Generation Goals
12.4 Performance Microbenchmarks
12.4.1 Local Data Handling
12.4.2 Network Operation
12.5 Usage Scenarios
12.5.1 Implementing a Full Publish/Subscribe System
12.5.2 IFlow
12.5.3 I/OGraph
12.6 Summary
13 High Performance Communication Services on Commodity Multi-Core Platforms: The Case of the Fast Financial Feed
13.1 Introduction
13.2 Market Data Processing Systems
13.2.1 The Ticker Plant
13.3 Performance Requirements
13.3.1 Skyrocketing Data Rates
13.3.2 Low Latency Trading
13.3.3 High Performance Computing in the Data Center
13.4 The OPRA Case Study
13.4.1 OPRA Data Encoding
13.4.2 Decoder Reference Implementation
13.4.3 A Streamlined Bottom-Up Implementation
13.4.4 High-Level Protocol Processing with DotStar
13.4.5 Experimental Results
13.4.6 Discussion
13.5 Chapter Summary
14 Data-Movement Approaches for HPC Storage Systems
14.1 Introduction
14.2 Lustre
14.2.1 Lustre Networking (LNET)
14.2.2 Optimizations for Large-Scale I/O
14.3 Panasas
14.3.1 PanFS Architecture
14.3.1.1 Data movement in PanFS
14.3.1.2 Eliminating the metadata bottleneck
14.3.1.3 Blade-based architecture and fault-tolerance
14.3.2 Parallel NFS (pNFS)
14.3.2.1 Differences from Panasas
14.3.2.2 Standard adoption
14.4 Parallel Virtual File System 2 (PVFS2)
14.4.1 BMI Design
14.4.2 BMI Simplifies the Client
14.4.3 BMI Efficiency/Performance
14.4.4 BII Scalability
14.4.5 BII Portability
14.4.6 Experimental Results
14.5 Lightweight File Systems
14.5.1 Design of the LWFS RPC Mechanism
14.5.2 LWFS RPC Implementation
14.5.3 Performance Analysis
14.6 Other MPP File Systems
14.7 Chapter Summary
14.8 Acknowledgements
15 Network Simulation
15.1 Introduction
15.2 Discrete Event Simulation
15.3 Maintaining the Event List
15.4 Modeling Routers, Links, and End Systems
15.5 Modeling Network Packets
15.6 Modeling the Network Applications
15.7 Visualizing the Simulation
15.8 Distributed Simulation
15.9 Summary

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